SAE J2628_201806

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Characterization, Conducted Immunity (Stabilized: Jun 2018)

SAE International , 06/12/2018

Pages: 19

Category:

The methods included in this document are:

a. Voltage-Temperature Design Margins.

b. Voltage Interruptions and Transients.

c. Voltage Dropouts and Dips.

d. Current Draw Under a Number of Conditions.

e. Switch Input Noise

These methods are best applied during the Development stage but can be used at all stages (e.g., Pre-Qualification, Qualification or Conformity).